The present invention relates to chemical mechanical polishing of substrates, and more particularly to a method of controlling a polishing machine.
Integrated circuits are typically formed on substrates, particularly silicon wafers, by the sequential deposition of conductive, semiconductive or insulative layers. After each layer is deposited, it is etched to create circuitry features. As a series of layers are sequentially deposited and etched, the outer or uppermost surface of the substrate, i.e., the exposed surface of the substrate, becomes increasingly nonplanar. This nonplanar surface presents problems in the photolithographic steps of the integrated circuit fabrication process. Therefore, there is a need to periodically planarize the substrate surface to provide a planar surface. Planarization, in effect, polishes away a non-planar, outer surface, whether a conductive, semiconductive, or insulative layer, to form a relatively flat, smooth surface.
Chemical mechanical polishing (CMP) is one accepted method of planarization. This planarization method typically requires that the substrate be mounted on a carrier or polishing head, with the surface of the substrate to be polished exposed. The substrate is then placed against a rotating polishing pad. In addition, the carrier head may rotate to provide additional motion between the substrate and polishing surface. Further, a polishing slurry, including an abrasive and at least one chemically active agent, may be spread on the polishing pad to provide an abrasive chemical solution at the interface between the pad and substrate.
The effectiveness of a CMP process may be measured by its polishing rate and by the resulting finish (roughness) and flatness (lack of large scale topography) of the substrate surface. Inadequate flatness and finish can produce substrate defects. The polishing rate sets the time needed to polish a layer and the maximum throughput of the polishing apparatus.
A typical chemical mechanical polisher is controlled by software that follows a recipe, i.e., a series of polishing steps with each step being performed with a preselected set of machine parameters, such as platen rotation rate, slurry delivery rate, and the like. Unfortunately, generating polishing recipes can be time-consuming and difficult, as each recipe is generated through trial and error.
In general, in one aspect, the invention is directed to a method of determining a polishing recipe. In the method, a plurality of test substrates are polished with a plurality of parameter sets. A polishing profile is measured for each of the plurality of test substrates, and a polishing time is calculated for each polishing parameter set which minimizes the difference between a predicted substrate profile and a desired substrate profile.
Implementations of the invention may include one or more of the following. A device substrate may be polishing using each of the polishing parameter sets in series for the polishing time calculated for that parameter set. An initial profile for the device substrate may be determined, and the predicted substrate profile may be calculated from a difference between a total polishing profile and the initial polishing profile. The total polishing profile may be calculated from a sum of the products of the polishing times and the associated measured profiles of the test substrates.
In another aspect, the invention is directed to a method of determining a polishing recipe. In the method, a plurality of test substrates are polished with a plurality of carrier head parameter sets that can be used during polishing of actual device substrates. This includes polishing a first set of test substrates to determine a variation in polishing profile as a function of the contact region diameter and polishing a second set of test substrates to determine the variation in the polishing profile as a function of the retaining ring pressure. An amount of material removed is measured at a plurality of different radial positions on each test substrate, a desired profile is created which represents the desired thickness across the substrate; and a polishing time is calculated for each of the plurality of carrier head parameter sets that will result in predicted substrate profile substantially equal to the desired substrate profile.
Implementations of the invention may include polishing a third set of test substrates to determine the variation in the polishing profile as a function of the edge control ring pressure.
Particular implementations of the invention may have one or more of the following advantages. A polishing recipe can be generated with improved polishing uniformity. Recipes for the carrier head pressure can be generated from empirical data, and consequently can provide a more accurate prediction than techniques based on theoretical models. Recipes can be generated quickly.